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HBT high speed circuits
This Paper on ICECS 1998, covers the results of all the IHP staff toward a high performance SiGe HBT Process for real circuits.
RF Circuits Fabricated with a CMOS-Compatible SiGe HBT Process Module
M. D. Pierschel, W. Winkler, *M. Rossberg
Institute for Semiconductor Physics Walter-Korsing-Stra§e 2 15230 Frankfurt (Oder), Germany
*Technical University Ilmenau Department of Solid State Electronics 89684 Ilmenau, Germany
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The add-on of digital functions (intelligence) to the RF front end
is the key enabler for the market boom in wireless communication.
The price race forces more functions to be integrated in a single chip.
Add-on of an HBT to an existing industrial CMOS process
No significant performance change to the digital CMOS
Add-on cost factor : ~ 1.3
Digital : output pad, bus driver
Analog : RF front end 900 MHz ... 6 GHz
Technological Targets and Process Control
Ring Oscillators with 23 ps Typical Gate Delay
Ring Oscillators Gate Delay
Ring Oscillator Benchmark
Divider Circuit Working Down to 1.2 V / 8.9 mA @ 6.2 GHz
LC Oscillators @ 750 MHz and 2.2 GHz ; 6 mW Power Consumption
LC Oscillator @ 1.65 GHz / 2.7 V supply / 3.5 mA
Transimpedance Amplifier for 10 GBit/s Systems
First experimental results
Low power operation @ high speed
ECL gate delay 23 ps with standard technology
Frequency divider operate down to 1.2 V / 8.9mA @ 6.2 GHz
Oscillator operation @ 725 MHz and 2.2 GHz ( 6 mW power )
Oscillator @ 1.65 GHz / 9.5 mW / 2.12 ps rms phase jitter
phase noise -89.95 dBc @ 100 kHz
Transimpedance amplifier for 10 Gbit/s systems
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